This invention relates generally to telecommunication networks. Specific embodiments of the invention relate to asynchronous transfer mode (ATM) networks. The invention relates more specifically to the detection of errors in the data payloads of data packets being handled by telecommunication devices and to the identification of specific malfunctioning modules within such telecommunication devices which cause data packet payload corruption. The data packets may be, for example, ATM cells, IP packets, frame relay packets or the like.
In a data telecommunication network, data is broken into data packets which are forwarded from sources to destinations. The data packets may all have the same fixed size as do ATM cells or may have variable lengths as do IP packets. Typically each cell includes a header which includes information about the data packet, including its destination and a data payload. According to the current ATM specification, each ATM cell is 53 bytes long and consists of a 48-byte payload and a 5-byte header.
The network comprises a number of data transmission links which are connected to one another at nodes. In traversing the network the data packets are passed along the transmission links from node to node. One or more telecommunication devices are located at each node. The telecommunication devices may have, between themselves, various functions including directing received packets to the appropriate outgoing transmission link.
For example, in an ATM network a number of virtual circuit connections (VCCs) are set up between pairs of end points on the network. Streams of ATM cells can be sent along each virtual circuit connection. In passing along a virtual circuit connection, each ATM cell typically passes through one or more ATM switches. The ATM switches direct the cells so that each cell will arrive at its intended end point. A challenge facing the designers of ATM networks is the very high speeds at which ATM cells must be passed through the network and switched by network switches. ATM cells can become corrupted as they pass through an ATM network for various reasons including hardware faults, hardware failures, and software errors which might, for example, cause certain components within an ATM switch to be improperly configured.
There are many systems for measuring the end-to-end performance of connections provided by an ATM network. Such systems typically measure the performance of end-to-end channels across an ATM network. While there are methods for determining the node in an ATM network at which faults are occurring such methods do not facilitate the location of specific faulty cards or modules of telecommunication devices on the ATM network. In studying the source of errors in ATM networks it is often assumed that errors arise in the communication links connecting switches in the network and that network switches perfectly transmit all ATM cells which they receive. ATM networks typically include many telecommunication devices. Each such device typically includes modules which may occasionally, if rarely, fail in ways which result in corruption of some ATM cells. Some such failures may be intermittent in nature. It is therefore almost inevitable that a practical ATM network will occasionally encounter situations where ATM cells become corrupted as they traverse the ATM network. In most practical ATM networks the localization of intermittent errors to particular switches or to particular portions of switches can be very difficult with prior methods.
Most standards governing the manner in which ATM cells are passed over the physical links which connect telecommunication devices in ATM networks include error detection protocols. There are no such standards for detecting TM cells which become corrupted within telecommunication devices.
There is a need for an effective way to detect and localize errors which result in the corruption of data payloads in ATM cells. In particular, there is a need for effective methods and apparatus capable of identifying specific cards or modules within ATM telecommunication devices at which ATM cells are being corrupted. There is a particular need for such methods and apparatus which fully cover data paths within ATM telecommunication devices and do not merely cover specific interfaces between devices or functions internal to a telecommunication device, such as a switch. Such data paths may include several buffers, interfaces, connections etc. as they pass through a telecommunication device.
This invention provides methods and apparatus for evaluating the performance of devices in telecommunication networks. Particular embodiments are directed to identifying faulty telecommunication devices which cause corruption of packets. More specific embodiments are directed to identifying faulty modules within a telecommunication device.
One aspect of the invention provides a method for identifying a malfunctioning module in a telecommunication device which has a data path for carrying data packets wherein the data path passes through several modules in the telecommunication device. The method includes at an upstream location on the data path within the telecommunication device generating a first payload integrity verification code from the payload of a data packet; attaching the first payload integrity verification code to the data packet; at a downstream location on the data path within the telecommunication device reading the payload of the data packet, reading the first payload integrity verification code from the data packet and checking to determine whether the first payload integrity verification code matches the payload of the data packet; and, if the first payload integrity verification code does not match the payload of the data packet, signalling an error.
Preferred embodiments comprise reading the first payload integrity verification code from the data packet and checking to determine whether the first payload integrity verification code matches the payload of the data packet at multiple downstream locations within the telecommunication device.
Another aspect of the invention provides a method for locating a faulty module in a packet handling device in a telecommunication network. The device has a data path for carrying data packets and the data path passes through a plurality of modules in the device. The method comprises: at a plurality of locations on the data path within the device reading an integrity verification code from the packet and determining if the integrity verification code matches the packet; and, if the integrity verification code at one of the locations does not match the packet, generating a signal indicating that the packet is corrupted.
In preferred embodiments, when the integrity verification code at one of the locations does not match the packet, the method further comprises determining a new integrity verification code which does match the packet and writing the new integrity verification code to the packet before passing the packet along the data path to a next one of the locations.
Yet another aspect of the invention provides a telecommunication device for handling data packets in a telecommunication network. The telecommunication device comprises: an ingress, an egress, and a data path extending between the ingress and the egress; a payload integrity verification code calculator at a first location on the data path; an payload integrity verification code writing circuit connected to write a first payload integrity verification code to a data packet at the first location; and, a payload integrity verification circuit at a second location on the data path downstream from the first location. In a preferred embodiment the payload integrity verification circuit comprises: a second payload integrity verification code generator located on the data path downstream from the first location; a comparing circuit connected to compare the first payload integrity verification code generated by the first payload integrity verification code calculator to a second payload integrity verification code detection generated by the second payload integrity verification code calculator; and, a signalling circuit to generate an error signal whenever the first payload integrity verification code is different from the second payload integrity verification code.
This invention may be applied to verify the integrity of the data payloads of ATM cells within ATM telecommunication devices, such as ATM switches. The methods of the invention involve generating a payload integrity verification code for ATM cells entering a telecommunication device. The payload integrity verification code is attached to the cell. At one or more downstream locations within the telecommunications device the payload integrity verification code is checked to determine whether it matches the cell data payload. This may be done by recalculating the payload integrity verification code and comparing it to the originally calculated payload integrity verification code. Preferably the payload integrity verification code is checked at multiple downstream locations to permit the identification of defective modules within the telecommunication device.
In some embodiments of the invention the payload integrity verification code is written to the VPI/VCI fields of the cell (i.e. one or more of the 5th through 28th bits of the 5 byte ATM cell header). While an ATM cell is in transit through a telecommunication device the VPI field, the VCI field, or both the VPI AND VCI fields are often irrelevant. Therefore one can surprisingly provide cell payload integrity verification by including a payload integrity verification code in VPI field and/or the VCI field without adversely affecting throughput of the telecommunication device. The payload integrity verification code may be a checksum, a CRC-8 value, a CRC-4 value, a parity bit, a BIP code or another suitable error correction or error detection code. In other embodiments of the invention the payload integrity verification code is included in an additional header or trailer attached to an ATM cell.
Further aspects and advantages of the invention are described below.